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Precision Design & Instrumentation Amplifiers

1. Philosophy of Precision​

When designing for minimal error, relying on "typical" error rates (e.g., 1%) cumulatively degrades system performance.

  • The Accumulation Problem: Settling for 1% error in one stage might be acceptable, but if you keep doing that all over the circuit (input buffer, gain stage, filter, ADC driver), the errors add up to a failed specification.
  • The Error Budget: You must quantify the total error allowed (Verr). This is typically the sum of offset voltage and the voltage drop caused by bias current:

    Formula: Verr = Vos + (Ib × Rsource)

  • Example Constraint: To satisfy conditions for a precision application, we might require a maximum of 100μV input offset and 10pA combined bias current. Meaning the errors of these together should not pass 1%.
    • Chosen Solution: Using a high-precision part (like a Chopper) might yield 50μV offset and 1pA current, resulting in only 0.6% total error.

2. Design Example: High-Precision Voltmeter​

Image Source: Adapted from The Art of Electronics (Figure 5.1)

This example illustrates a rigorous approach to precision design, aiming to build a high-performance analog voltmeter with the following constraints:

  1. Low Voltage Range: It must measure very small signals (0–10mV full scale).
  2. High Input Impedance: It needs 10MΩ input resistance to avoid loading the circuit being measured.
  3. Single Supply (Low Voltage): It must run on a single battery (lithium or alkaline), working down to just +1.8V total supply. This requires an op-amp that works near 0V (rail-to-rail).
  4. Zero Error: It must read exactly 0mV when the input is disconnected, without requiring manual zero-adjustment.

Component Functions:

  • R4 (100Ω, 0.1%): Current Sense Resistor.
    • Role: Precision / Scaling.
    • Action: This component sets the accuracy of the entire meter. The op-amp feedback forces the input voltage to appear exactly across this resistor. By Ohm's Law, this converts the input voltage into a precise current that flows through the meter movement.
  • R3 (10kΩ): Meter Protection (Safety Valve).
    • Role: Limiter.
    • Action: Protects the physical meter coil. If the op-amp output accidentally swings to the full battery voltage (e.g., during saturation or startup), R3 limits the current to a safe ~0.3mA.
  • R2 (10kΩ): Input Current Limiter.
    • Role: Input Protection.
    • Action: Protects the clamp diodes. In the event of a high-voltage input overload (e.g., connecting a 9V battery by mistake), this resistor limits the current flowing into the protection diodes so they don't burn out.
  • Diodes (PN4117): Input Voltage Clamps.
    • Role: Over-Voltage Protection.
    • Action: These protect the sensitive op-amp inputs. They clamp any dangerous input voltages to safe levels (~0.6V) to keep the op-amp from being destroyed during mis-wiring.
  • R1 (10MΩ): Input Impedance / Bias Return.
    • Role: Impedance Setting.
    • Action: Sets the input resistance to the required 10MΩ specification and provides a DC path for the tiny input bias currents.
  • C1 (10nF) & R5 (100kΩ): Frequency Compensation (The Split Path).
    • Role: Stability.
    • Action:
      • R5 provides the DC feedback path to the meter.
      • C1 provides the AC (high frequency) feedback path.
      • Why? The physical meter is an inductor (a coil). It naturally blocks high frequencies. Without C1, the op-amp would lose feedback at high speeds and oscillate. C1 allows high-frequency signals to bypass the slow meter and go straight back to the op-amp, keeping the loop stable.

3. Design Example: Autonulling DC Laboratory Amplifier​

Image Source: Adapted from The Art of Electronics (Figure 5.3)

Function: This circuit allows you to "freeze" an input signal and amplify any subsequent changes by gains of 1, 10, or 100.

Circuit Architecture:

  • U1: An instrumentation amplifier with a configurable gain of 1–x.
  • U2: A non-inverting stage with a fixed gain of 10.
  • Total System Gain: Capable of x1000.
  • Output Scale: ± 10V.
  • Nulling Circuitry (U3, U4, U5): This section handles the signal "freezing" and subtraction.

The Error Budget: To ensure precision, the design must meet specific drift constraints:

  1. Input Drift: Must be less than 10μV.
  2. Null Drift: Must be less than 1μV/min (primarily caused by the discharge of the hold capacitor).

Component Selection Strategy:

  • Gain Setting Resistors (R1 – R4): Must be 0.1% tolerance to ensure accurate gain steps.
  • Non-Critical Resistors (R5 – R13): These are 1% tolerance. Their accuracy is irrelevant for the circuit's precision performance (used for biasing/logic).
  • The Hold Capacitor:
    • Material: Must use materials with the lowest possible leakage (e.g., Polypropylene or Teflon ("poly-stuff")).
    • Leakage Calculation: If the capacitor has a leakage resistance of 100GΩ and the output is at 10V, the leakage current results in a drift of 3mV/min, which is unacceptable given the 1μV/min spec.
    • Dielectric Absorption (Memory Effect): Capacitors have a tendency to return to a previous state of charge after being discharged.
      • The Risk: In sample-and-hold applications, after you discharge a cap and re-open the switch, the voltage will "jump" back slightly towards its previous voltage before settling. This introduces error.

4. The Big Trade-Off: BJT vs. FET​

This is the single biggest divider in component selection: determining whether to use BJT (Bipolar) or FET (JFET/CMOS) inputs.

BJT Inputs (Bipolar)​

  • The Superpower: Extremely low Voltage Noise (en). Essential for audio and low-impedance sensors.
  • The Sacrifice: High Current Noise (in) and Input Bias Current (IB). Because BJTs need base current to run, they physically suck current from your sensor.
  • Temperature Behavior: Bias current is relatively stable with temperature (it actually drops slightly as temp rises).
  • Technology Trade-off: Bipolar inputs generally have lower (better) offset voltage than JFET/CMOS.

FET Inputs (JFET/CMOS)​

  • The Superpower: Extremely low Bias Current (IB) and Current Noise. Essential for high-impedance sources (Photodiodes, pH probes, ECG).
  • The Sacrifice: Higher Voltage Noise (usually) and often higher Offset Voltage (though modern trimming is fixing this).
  • Temperature Behavior: Bias current is incredibly low at room temperature, but doubles every 10°C.

The Drift and Temperature Problem (Real World Nightmare)​

  • Scenario: You pick a FET op-amp with 1pA bias current for a device sitting in a hot car (85°C).
  • The Calculation: That 1pA doubles every 10°C. By 85°C, it becomes 64pA.
  • The Result: Suddenly your precision circuit drifts wildly. A BJT might have been the better choice if the source impedance wasn't too high, as its bias is more stable over temp.

The Practical Example: ECG​

If you select a BJT op-amp for your ECG circuit, you might get great low-noise specs on paper.

  • The Failure: When you connect it to a patient (High Impedance Skin), the BJT's bias current flows through the skin resistance.
  • The Result: This creates a massive DC offset (V=IR) and "current noise" that swamps the signal. Knowing "I need a FET here" prevents you from even looking at the BJT options.

Summary Compass (Topology as a Guide)​

  • High Impedance Source (Light, pH, ECG)? → Start looking at FETs/CMOS.
  • Low Impedance Source (Audio, Strain Gauge, Power)? → Start looking at BJTs.
  • Need Speed (Slew Rate)? → FETs usually win (as discussed in the Slew Rate section).

5. Amplifier Input Errors​

Input Bias Current​

  • The Source Impedance Interaction: Input bias current creates immediate voltage errors when flowing through source resistance.
    • Example: If you got a source impedance of 1kΩ, and an input bias in the nano-amps, you already got microvolts of error.
  • Component Selection:
    • FET Amplifiers: These help here since they barely draw current, but they do have increased voltage offsets.
    • Bipolar Super-Beta Op-Amps: Other types of amps like bipolar superbeta op-amps etc can work.
  • Common Mode Variation: When comparing op-amp input currents, sometimes it varies by input voltage. Have to watch out for that.

Input Offset Voltage & Trimming​

  • Trust "Max," Not "Typical": When designing precision instruments, you cannot rely on "typical" offset specs (often <10μV); you must design around the maximum specified offset.
  • Drift Specs are "Soft":
    • Temperature Drift: Important for stability, but rarely production tested by manufacturers.
    • Time Drift: Often unspecified in modern datasheets; when it is, it may behave more like a "random walk" (nV/√month) rather than a predictable linear drift (nV/month).
  • Trimming Limitations:
    • Dont rely too much on further trimming, usually the manufacturer does a decent job, trying to get better will be hard.
    • Sometimes there is an external trimming network provided that you can use to trim further and reduce the voltage offset.

Rejection Ratios & Gain​

  • CMRR (Common Mode Rejection Ratio): Having insufficient CMRR degrades circuit precision by introducing a voltage offset as a function of DC level at the input.
    • The RRIO Trap: Be careful with Rail-to-Rail Input/Output (RRIO) op-amps; their offset voltage can shift significantly as the input common-mode voltage changes (effectively poor CMRR), unless they use internal charge pumps (like the OPA364).
  • PSRR (Power Supply Rejection Ratio):
    • Changes in power supply voltage cause small op-amp errors. PSRR is what to look at.
    • Frequency Dependence: PSRR drops as frequency increases.
  • Gain vs. Frequency: Gain varies by frequency. Make sure to check your gain at the frequency of interest.

6. Noise Characteristics​

Definition: Voltage noise is the in-band variation of op-amp input–offset voltage that’s indistinguishable from signal.

1. What is Noise Density (en)?​

  • The Definition: It is the amount of noise the op-amp generates in a single slice of bandwidth (1Hz). It is measured in nV/√Hz.
  • The Curve:
    • High Frequency: The noise is usually "Flat" (White Noise). This is the number usually printed in the table (e.g., at 1kHz).
    • Low Frequency: The noise rises as frequency drops. This is called 1/f Noise (or Pink Noise). Standard op-amps get noisy at DC; "Auto-zero" amps stay flat.

2. Why you can't ignore it (The Math)​

You might think 10nV sounds tiny. But you don't hear 10nV; you hear the Integrated Noise.

  • The Formula: Total Noise = Density × √Bandwidth.

    Vtotal = en × √BW

  • The "gotcha": If you have a 100kHz bandwidth circuit and a "quiet" 10nV/√Hz op-amp:
    • 10nV × √100,000 = 10nV × 316 ≈ 3.16μV.
    • That tiny number just got multiplied by 300. If your sensor signal is only 10μV (like a weak EEG), your signal is now buried in noise.

3. The Specific Danger for YOU (Transimpedance)​

Since you asked about Photodiode Amplifiers (Transimpedance) earlier, this is critical.

  • The "en C" Problem: The text specifically warns that at high frequencies, voltage noise (en) interacts with your sensor's capacitance (Cin) to create a massive current noise:

    in = en 2πf Cin

  • Translation: In high-speed photodiode circuits, the voltage noise of the op-amp is often the dominant source of error, even more than the feedback resistor noise.
  • Verdict: If you are blinking an LED, ignore noise density. If you are measuring ECG (low frequency 1/f noise matters) or Photodiodes (high frequency en matters), this parameter determines if your device works or just outputs static.

4. 1/f Noise (Flicker Noise) - Technical Highlights​

  • Noise Density vs. Total Noise: While noise spectral density (en) rises at low frequencies (below the 1/f corner), the total RMS noise voltage is calculated by integrating the square of the density over the specific frequency band:

    vn2 = ∫ en2 df

  • The Bandwidth Factor: Although the noise density is higher at low frequencies, the total noise can still be manageable because the frequency span (bandwidth) at the low end is often small.
  • The "Corner Frequency" Matters: When comparing op-amps for low-frequency applications, the white noise spec (usually at 1kHz) is misleading.
    • Comparison Example: An op-amp with higher white noise (e.g., LT1012 at 14nV/√Hz) can actually be quieter at low frequencies than a lower-noise part (e.g., OPA277 at 8nV/√Hz) if it has a lower 1/f corner frequency (2.5Hz vs. 20Hz).
  • Auto-Zero Exception: Auto-zero (chopper) op-amps do not exhibit 1/f noise. Their noise density remains flat down to DC, making them superior for very low-frequency measurements.
  • The Primary Spec (Vnpp): The most useful parameter for evaluating low-frequency performance is Vnpp (Peak-to-Peak Voltage Noise).
    • This measures noise over the 0.1Hz to 10Hz band.
    • This parameter serves as a proxy for "DC noise" and is a strong indicator of an op-amp's long-term drift stability.
  • Scaling Rule: If you need to estimate noise for a bandwidth starting lower than 0.1Hz (e.g., 0.01Hz), multiply the Vnpp value by the square root of the number of additional decades (equal power per decade means noise adds up as √decades).
    • Relevance to ECG: Since diagnostic ECG bandwidth extends down to 0.05Hz, the Vnpp (0.1–10Hz) specification is the single most important noise number for your baseline stability. A high 1/f corner will cause your ECG baseline to wander.

Noise Impedance (Zn) and Source Matching​

This concept dictates whether you should optimize for Voltage Noise (en) or Current Noise (in).

  • Definition: Noise Impedance is the ratio of an op-amp's voltage noise to its current noise (Zn = en / in).
  • Engineering Rule: Compare Zn to your signal source impedance (Zs).
    • If Zs << Zn: The circuit is dominated by the op-amp's Voltage Noise. (Typical for Audio, Power Supplies, Strain Gauges).
    • If Zs >> Zn: The circuit is dominated by the op-amp's Current Noise. (Typical for ECG, pH probes, Photodiodes).
  • Selection: High-impedance sensors require low current noise (typically FET inputs), even if their voltage noise spec looks worse.

Current Noise (in) & Bias Cancellation​

  • The Discrepancy: In standard op-amps, current noise is predictable based on the shot noise of the bias current (in = √(2qIB)).
  • The Exception (Bias Cancellation): Many precision BJT op-amps use internal circuitry to cancel the DC Input Bias Current (IB). While this lowers the DC drift, it increases the AC Current Noise significantly.
  • Practical Consequence: You cannot calculate AC noise performance based on the DC Bias Current spec for these parts. You must verify the in specification explicitly in the datasheet, as it can be 10x higher than the theoretical shot noise would suggest.

Medical Application Mapping (The "Killers")​

1. The ECG "Killer": 1/f Noise & Bias Current​

  • The Signal: Tiny voltage (~1mV), extremely slow (0.05Hz to 100Hz), High Source Impedance (Skin ≈ 500kΩ).
  • The Engineering Challenge:
    • 1/f Noise: You are working at DC to 100Hz. This is exactly where op-amp noise "pink" curves skyrocket. If you pick an op-amp with a high 1/f corner, your baseline wanders and looks like "breathing" artifact.
    • Input Bias Current: Since skin impedance is high, a BJT input drawing 100nA will create a 50mV offset right on the electrode (V=IR). This can rail your amp before you even amplify the signal.
  • The Component Choice: You usually want JFET/CMOS (low bias) with Low 1/f noise (chopper/auto-zero are popular here for this reason).

2. The Gating "Killer": Slew Rate​

  • The Signal: You need to detect the R-Wave to trigger an MRI or CT scan. The R-Wave is the sharpest, fastest part of the cardiac cycle.
  • The Engineering Challenge:
    • Pacemaker Spikes: These are incredibly fast (<2ms) and high voltage.
    • Slew Rate: If your op-amp is too slow (low Slew Rate), it will turn the sharp, distinct Pacemaker spike into a blurry lump that looks like a QRS complex. Your gating algorithm will misfire, triggering the scan on the pacer spike instead of the heart beat.
  • The Component Choice: You need reasonably high Slew Rate to preserve the sharp vertical edges of spikes for the digital trigger logic.

3. The Pleth/SpO2 "Killer": Voltage Noise Density (en)​

  • The Signal: A Photodiode current converted to voltage (Transimpedance Amplifier).
  • The Engineering Challenge:
    • Capacitance: Photodiodes have capacitance.
    • Noise Gain: Op-Amp Voltage Noise (en) interacts with that capacitance to create massive noise at high frequencies (in = en ω C).
  • The Component Choice: Even though it's a "current" source, you often pick an op-amp with Low Voltage Noise (en) to minimize this multiplication effect.

4. The Respiration "Killer": Dynamic Range (Offset)​

  • The Signal: (Impedance Pneumography) You inject a carrier sine wave and measure tiny amplitude changes (~1%) as the chest expands.
  • The Engineering Challenge: The "Baseline" impedance is huge (500Ω), but the "Breath" change is tiny (1Ω).
  • Offset Voltage: If your offsets are bad, you waste your dynamic range amplifying the DC error (the 500Ω) rather than the AC signal (the 1Ω).

7. Dynamic Performance: Bandwidth, Slew & Distortion​

Bandwidth (GBW)​

  • Loop Gain: High Gain-Bandwidth Product (GBW) is not just for high-speed signals. It provides "spare" Loop Gain at lower frequencies, which improves linearity and reduces distortion.
  • Decompensated Op-Amps: To achieve very high speeds, some op-amps are "decompensated." These are not stable at unity gain (Buffer). They require a minimum closed-loop gain (e.g., AV ≥ 10) to prevent oscillation.

Slew Rate​

  • The Core Problem (The Capacitor Bottle-Neck): Most op-amps are built using the "Widlar topology." The input stage drives a second stage that has a Compensation Capacitor (C).
  • The Limitation: To change the output voltage, the internal circuitry must charge or discharge this capacitor. The input stage has a fixed maximum current (IE) available to do this.
  • The Result: Slew Rate is essentially how fast that fixed current can fill that capacitor (dV/dt = I/C). Once the input stage is dumping 100% of its current into the capacitor, the output cannot move any faster.

The Consequences for Precision​

When an op-amp hits its slew rate limit, two bad things happen to your precision:

  1. Frequency/Amplitude Limit: You cannot have both high frequency and high voltage (Vpp = S / πf).
  2. Input Error Spike: Normally, the voltage difference between the two input pins is nearly zero. However, to drive the output fast, the op-amp demands a large error voltage across the inputs. During a fast event (like a pacemaker spike), the feedback loop temporarily breaks.

How to Get More Speed (The "Enhancement Factor")​

Standard BJT op-amps have a predictable relationship: Slew Rate ≈ 0.3 × Bandwidth. To get faster slew rates without just buying a massive bandwidth chip (which consumes more power), engineers use different input stage architectures:

  • JFET Inputs (e.g., LF411): They have lower transconductance, which inherently allows for higher slew rates relative to their bandwidth (Enhancement factor m=12).
  • Emitter Degeneration: Adding resistance to the input transistors reduces gain but increases speed.
  • Cross-Coupled / Butler Stages: Specialized designs (like in the TLE2142 or OP275) that boost current availability to the capacitor.
  • Current Feedback (CFB): A different topology entirely (e.g., LT1210) that offers massive slew rates (m=55+) but is harder to use in precision DC circuits.

Distortion Mechanisms & Datasheet Traps​

As signal frequency rises, Loop Gain falls, reducing "correction power" and causing output distortion to rise sharply.

The Measurement "Traps" (Caveats)​

You cannot simply compare distortion graphs between two different manufacturers because there is no standardized test.

  1. Trap 1: The Noise Floor Mask: Many distortion plots look flat at low frequencies. This is often a lie. The op-amp might be better than the graph shows, but the measurement equipment hit its own noise floor, masking the true performance.
  2. Trap 2: Input Capacitance Distortion (High Impedance Sources):
    • Scenario: You use a JFET op-amp (like the OPA1641) with a high source impedance.
    • The Glitch: The Input Capacitance of JFETs changes with voltage (Cin varies with Vcm).
    • The Result: This varying capacitance creates a varying filter cutoff, modulating the phase and causing massive distortion (e.g., jumping from 20ppm to 100ppm).
    • Summary: Be terrified of Input Capacitance Modulation for sensors/ECG.
    • The Fix: Use the Inverting Configuration (constant common-mode) or match impedances perfectly.
  3. Trap 3: The "Gain of 101" Trick: To measure ultra-low distortion, manufacturers often build a test circuit with a "Noise Gain" of 101 to magnify the error so their equipment can see it, then divide the result by 100. This creates an artificially low source impedance environment that might not match your real-world circuit.

Phase Error​

  • The Rule of Thumb: If you care about phase accuracy (How fast the input lags the output, mostly in video situations), your Op-Amp's bandwidth needs to be 50x to 100x faster than your signal frequency. If you don't care about phase (just amplitude), it only needs to be 10x faster.

8. Output Characteristics​

The "Dead Zone" (Crossover Distortion)​

Some older or low-power op-amps (like the classic LM324 or LM358) use a Class-B output stage to save power.

  • The Problem: The internal output transistors are not biased "on." There is a voltage gap of approx. 1.2V (two diode drops, 2VBE) between the NPN pushing current and the PNP pulling current.
  • The Result: When the signal crosses zero (switching from push to pull), the op-amp has to "jump" across this gap. For a brief moment, the output disconnects and sits at zero while the internal circuitry slews to turn on the other transistor.
  • Why it matters: This creates a nasty glitch near the zero-crossing point. It is worse at high frequencies because the op-amp's loop gain is weaker, so it can't correct the glitch fast enough. (This effect is often blamed for the harsh "transistor sound" in early solid-state audio).
  • The Fix: Use Class-AB op-amps (like the LT1013). These bias the output transistors so they are always slightly conducting. There is no gap to jump, and the distortion vanishes.

The Invisible Resistor (Output Impedance)​

We often assume op-amp output impedance is zero. In reality, the Open-Loop Output Impedance (Ro) can be hundreds of ohms.

  • It Varies: Ro is not constant. It is typically highest when the output voltage is near ground (because the internal transistors are running at low current) and rises at high frequencies (because transistor gain drops).
  • The Danger (Capacitive Loads): This finite resistance reacts with any capacitor you connect to the output (Cload).
  • The Math: Ro and Cload form a Low Pass Filter inside the feedback loop.
  • The Consequence: This adds Phase Lag. If the lag gets too large, the negative feedback turns into positive feedback, and the op-amp becomes unstable and oscillates.
Design Summary
  • Don't trust an old LM358 for high-quality audio (it has dead zones).
  • Don't assume any op-amp can drive a capacitor directly (the internal output resistance will cause oscillation).

9. Rail-to-Rail Mechanics​

Rail-to-Rail operation is desirable for low-voltage systems but comes at a cost.

Definitions​

  • RRI: Op-amp operates with full rail-to-rail voltage at the inputs.
  • RRO: Op-amp outputs can go from rail to rail source voltages.
  • RRIO: Can do both.

RRI Issues (Input Crossover)​

  • Mechanism: RRI op-amps usually consist of two input pairs (PMOS and NMOS). As the input voltage climbs, the op-amp switches from one pair to the other.
  • Shift in Errors: This handover causes a sudden shift in input bias current and offset voltage.
    • Consequence: This creates a crossover distortion bump and effectively degrades CMRR/linearity.
  • Topology Note: Most RRI op-amps are CMOS. BJT op-amps are rarely true rail-to-rail input.
  • Mitigation:
    • If you dont NEED RRI but can instead use RRO, do that.
    • These sudden changes can be circumvented by using an inverting configuration (inputs stay at Virtual Ground).

RRO Issues (Output Impedance)​

  • Mechanism: RROs outputs dont use complimentary push-pull outputs, instead they use a common source amplifier.
  • Consequence:
    • This causes there to be a high output impedance dependent on the load resistance.
    • This also means that a capacitive load causes a lot of phase shift.
    • These rail to rail op amps typically have a lot worse distortion than regular ones.

10. Amplifier Topologies​

1. Auto-Zero / Chopper Stabilized​

  • Mechanism: Has an internal mechanism that monitors the inputs and brings Vos to 0.
  • Performance: Best Vos performance of all op-amps. Corrects input offset voltage, drift, and 1/f noise.
  • Downsides:
    • Usually have very limited supply voltages (6V max usually).
    • Can get a bit noisy and "shake" the output (clock feedthrough). This can be mitigated using a low pass filter.
  • Use Case: Slow, accurate measurements from transducers and normal bandwidth applications.

2. Difference Amplifier​

  • Function: Takes in 2 signals (usually a differential signal pair) and outputs a signal proportional to the difference between them:

    Vout = G × (Vin+ - Vin-)

  • Characteristics:
    • High CMRR.
    • Low but accurate gain.
    • Impedance is on the lower side.
    • Inputs can usually go beyond the rails.
  • Use Case: Meant to be driven by a low impedance source.

3. Instrumentation Amplifier​

  • Function: Takes in differential inputs, provides a single-ended output.
  • Characteristics:
    • Very high input impedance (buffered inputs) to not load down the source.
    • Very wide range in gain (user settable).
    • Very High CMRR: Critical for rejecting common-mode noise.
  • The CMRR Math:
    • Goal: Amplify millivolt differential signals while rejecting a ~2.5V common-mode signal.
    • Example: Suppose you want a maximum error of 0.1% of full scale. That’s ±0.01mV error riding on 2500mV common mode.
    • Calculation: This amounts to a CMRR of 250,000:1, or 108 dB.
  • Use Case: Meant for very small signals where precision is paramount.

4. Differential Amplifier​

  • Function: Differential or single-ended input, with a differential output.
  • Use Case: Often used to drive differential ADCs.

11. Summary Checklist for Precision Design​

  • High Impedance Source (ECG/pH)? Ignore Voltage Noise (en). Minimize Current Noise (in). Use FETs.
  • Low Impedance Source (Strain Gauge/Power)? Ignore Current Noise. Minimize Voltage Noise (en). Use BJTs.
  • Using a BJT for precision? Check if it uses Bias Cancellation. If yes, assume current noise is much higher than the bias current suggests.
  • High Frequency Signal (Resp/Gating)? Check CMRR at that specific frequency, not just the DC number.
  • High Speed/Audio? Look for specific THD+N graphs, but be skeptical of flat lines at low frequency (Noise Floor Mask).